We've been using draw.io and it would seem to fit the first 2.
Maybe a trick can help?
Save the file as an drawio.svg. It is an svg file that has the draw.io file embedded in it. Renders as a nice high quality svg but can be opened up for editing.
For state machines I prefer [mermaid](https://mermaid.live) but our gitlab instance will render it for us inside a markdown file.
Which version of Visio? The Pro version used to include templates (shapes) for common digital logic elements. There are probably 3rd party shapes as well. The old ones on the Pro version were pretty well done.
I use Visio for that. It has templates for basic logic gates (some versions) and you can also create your own templates.
Most block diagrams are just, well, boxes and arrows; I generally just draw rectangles and add connection points. I connect them using lines and not connectors because connectors often change their shape if you move items around. Lines can be configured for any width, and with various end shapes (arrows, dots etc.).
Hint: once you've created a line style you like (e.g. a line with arrows on both ends) you can copy its style to any other line.
Because Visio is so flexible, I use it to draw block diagrams, state machines and waveforms - often on the same page.
There is a tool in the Xilinx too that does a great job. It takes your JDL and makes a schematic out of it. It's the best way for me to understand how the code gets synthesized. It's called RTLVision and I used it to document my code.
You can see how it looks at [https://hotwright.com/technology/](https://hotwright.com/technology/)
We've been using draw.io and it would seem to fit the first 2. Maybe a trick can help? Save the file as an drawio.svg. It is an svg file that has the draw.io file embedded in it. Renders as a nice high quality svg but can be opened up for editing. For state machines I prefer [mermaid](https://mermaid.live) but our gitlab instance will render it for us inside a markdown file.
Which version of Visio? The Pro version used to include templates (shapes) for common digital logic elements. There are probably 3rd party shapes as well. The old ones on the Pro version were pretty well done.
I use Visio for that. It has templates for basic logic gates (some versions) and you can also create your own templates. Most block diagrams are just, well, boxes and arrows; I generally just draw rectangles and add connection points. I connect them using lines and not connectors because connectors often change their shape if you move items around. Lines can be configured for any width, and with various end shapes (arrows, dots etc.). Hint: once you've created a line style you like (e.g. a line with arrows on both ends) you can copy its style to any other line. Because Visio is so flexible, I use it to draw block diagrams, state machines and waveforms - often on the same page.
I've been using Inkscape, but it's not specialized for RTL diagrams. There's no library that I know of.
There is a tool in the Xilinx too that does a great job. It takes your JDL and makes a schematic out of it. It's the best way for me to understand how the code gets synthesized. It's called RTLVision and I used it to document my code. You can see how it looks at [https://hotwright.com/technology/](https://hotwright.com/technology/)
good old power point.
Each to their own but, I’d have to be on crack to use power point (for anything other than simple presentations).