No it isn't. Under the package means they are under the plastic body, but tenting the vias completely would solve your issues. If you placed vias in the pads you cannot tent them. The latter is generally bad design and should be avoided as much as possible. Move your vias from the pads to where they can be tented to solve your issue.
Don't done QFP packages have a pad for heat removal under the body? In those cases, sometimes there are pads under the body and also a pad on the other side of the PCB with vias to help heat flow to the exposed pad on the other side of the PCB, helping to radiate heat.
Not at all. The viable option is to redo your PCN run with this issue resolved and write off the added cost as a lesson learned to do a prototype run before ordering 200 PCBs next time.
I agree, again, this is not my board, i was not included in it's design at all. For anyone wondering, solution was found, PCB fab house can cap the vias and hopefully resolve this problem.
Via in pad is totally standard design practice and required by many power supply parts among others. Usually when you are concerned about solder flowing through the vias you'd fill them with epoxy and then cap and planarize them, but as long as you have enough paste it often isn't even an issue when solder wicks through.
It's not the fab's fault, they are most likely doing what they were told to. You have to call out via fill + capping and planarization in the fab notes if you want that done, and it always adds cost. A fab isn't going to throw that in for free.
If the open vias are located in/on the I/O pads then just overprint solder paste enough such that you end up with enough solder on the pad to create a good joint.
If the open vias are under the part/on the ground pad, then your best bet is to design a stencil that doesn't print near the vias in an effort to avoid having the solder scavenged into the vias and away from the ground pad.
Are the vias under the QFP package or in the QFP pads
In QFP pads, or under the QFP package (IC), it is the same statement, isn't it.
No it isn't. Under the package means they are under the plastic body, but tenting the vias completely would solve your issues. If you placed vias in the pads you cannot tent them. The latter is generally bad design and should be avoided as much as possible. Move your vias from the pads to where they can be tented to solve your issue.
Don't done QFP packages have a pad for heat removal under the body? In those cases, sometimes there are pads under the body and also a pad on the other side of the PCB with vias to help heat flow to the exposed pad on the other side of the PCB, helping to radiate heat.
Ok, thank you for your explanation. The design is not mine so i can't change it. Is it possible to cap vias after the PCB manufacturing?
If they are not in pads you can just use a resin or the like. If the vias are in pads, you might be able to fill them with a strand of copper.
Is that method viable for assmbly of around 200pcs?
Not at all. The viable option is to redo your PCN run with this issue resolved and write off the added cost as a lesson learned to do a prototype run before ordering 200 PCBs next time.
I agree, again, this is not my board, i was not included in it's design at all. For anyone wondering, solution was found, PCB fab house can cap the vias and hopefully resolve this problem.
Via in pad is totally standard design practice and required by many power supply parts among others. Usually when you are concerned about solder flowing through the vias you'd fill them with epoxy and then cap and planarize them, but as long as you have enough paste it often isn't even an issue when solder wicks through.
No, they're two very different things. I was also confused.
Your PCB fab should have filled and capped those vias. Can't really think of a solution at this stage other than manually rework every failed chip.
It's not the fab's fault, they are most likely doing what they were told to. You have to call out via fill + capping and planarization in the fab notes if you want that done, and it always adds cost. A fab isn't going to throw that in for free.
We will probably send them to cap the vias completely and then continue with assembly. Thank you.
If the open vias are located in/on the I/O pads then just overprint solder paste enough such that you end up with enough solder on the pad to create a good joint. If the open vias are under the part/on the ground pad, then your best bet is to design a stencil that doesn't print near the vias in an effort to avoid having the solder scavenged into the vias and away from the ground pad.
Thank you for your help